The CRL Code

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The CRL Code

The CRL code for the readout described above would have the following structure :

############### SECTION 1 ####################
# DO NOT change the lines in this block ******
readout list VME1
# event buffer size (bytes), number of event buffers in pool
maximum 400,2000
vme readout
include "/home/coda/cat_software/crl/TUNL_crl_reg.h"
include "/home/coda/cat_software/scalers/buffser.h"
include "expt_module_setup.h"
include "expt_crl.h"
const FCODE = 9
const TIR_ADDR = 0x0ed0
const CRATE=1
unsigned long laddr;
int camacdata=0, qstat;
int chlista[32], chlistb[32], chlistc[32];

unsigned long data32;
unsigned short data16;
#
# End of hands-off block  ********************
############### SECTION 2 ####################
variables ...

begin download
...
end download

begin prestart
...
end prestart

begin go
...
end go

begin trigger usrtrig
...
end trigger

begin end
...
end end

begin pause
... 
end pause



begin done usrtrig
...
end done 

begin done
end done

begin status
...
end status

#############################################

Let us describe these sections in detail.

The section 1 of the CRL code contains the name (VME1) of the readout list.
```
readout list VME1
```
The maximum size of the event buffer is defined and maximum number of event buffers are set. NOTE: comments are allowed with a leading #.
```
#  event buffer size (bytes), number of event buffers
maximum 400,2000
```
The CRL is decleared to be a VME based readout list.
```
vme readout
```
We want to include some header files which would contain the hardware setup details, as well as readout routines. The TUNL_crl_reg.h, and buffser.h are standard include files and must not be modified by the user. The other two include files , expt_module_setup.h and expt_crl.h, contain user specific details about module setups, and readout schemes. The changes required in these files are described later. The remaining entries in this section are not to be modified by the user.

Section 2 of the CRL code contains the instructions for the ROC, specific to the CODA transition state. These transition blocks DO NOT need to be included in the CRL code in any order, however, their execution occurs in a very specific order, as described later in this chapter. The following list shows the section 2 of the CRL code specific to the hardware for the example experiment.

# Declear variables here to be used later in the CRL code.
# In this case we have two ADC Slot variables, indicating
# the location of the ADCs in the CAMAC crate

int ADC1SLOT = 3;
int ADC2SLOT = 5;
int SCLRSLOT = 9;

# Following line is for internal use, please ignore

int SCLR_EVNT = 8;
#
# Uncomment bigendian_out line when host computer 
# is running the linux OS
extern int bigendian_out;

begin download

# DO NOT change the lines in this block ***************
# This block contains the setup for the JLab TI. 
#
  variable res

# Setup TIR pointers
%%
  res = (unsigned long) sysBusToLocalAdrs(0x29,TIR_ADDR,&laddr);
  if (res != 0) {
     printf("Error in sysBusToLocalAdrs res=%d \n",res);
  } else {
     printf("Trigger Interface address = 0x%x\n",laddr);
     tir[1] = (struct vme_tir *)laddr;
  }
InitTrigInterface(TIR_ADDR);
%%
#
# End of hands-off block  ****************************** 

# Set bigendian_out=0 for data sent to Linux box
  bigendian_out = 0;

# The following three lines, ccinit, cccz, and cccc 
# initialize the CAMAC crate using the VC-32:CC32
# controller, generate a CAMAC Z, and generate a
# CAMAC C, respectively.
#
	ccinit(0);
	cccz(0);
	cccc(0);
# The Following statement resets CAMAC crate
   tcnaf(CRATE, 31, 0, 16, 0, qstat); /* reset for CC32 crate controller */

# Initialize VME Digitizers (such as ADCs, TDC, etc)
# At present, no such modules are included.
# The following 'log' statement prints the message on the
# screen during this CODA transition.
#
  log inform "Initializing VME modules"

# Register locations of CAMAC modules
  log inform "Registering CAMAC modules"
#
# You must specify the location of the CAMAC module
# and how many channels you plan to read from the module
# to reserve space in READOUT memory.
# Syntax :
# camac_reg(crate_number,slot_number,channels_to_read)
#
#  For the two Ortec 413s
#
   camac_reg(1, ADC1SLOT, 4);
   camac_reg(1, ADC2SLOT, 4);
#
#  For the KS3610 Scaler
   camac_reg(1, SCLRSLOT, 6);

 log inform "User Download Executed"

end download
    
begin prestart
	int i;

  log inform "Entering User Prestart"

# Hands-OFF-Start ****************************************
#
  init trig source VME
  link async trig source VME 1 to usrtrig and usrtrig_done
  event type 1 then read VME 1

# Initialize channel lists for readout 
	for(i=0; i<32; i++) chlista[i] = i;
	for(i=0; i<32; i++) chlistb[i] = i;
	for(i=0; i<32; i++) chlistc[i] = i;
	chlistb[2] = 3;
	chlistb[3] = 2; /* channel 2 bad */
#
# Hands-OFF-ENDS *****************************************
# Reset ADCs and TDCs
# Syntax:
# tcnaf(crate,slot,0,function_code,0,qstat)
#
    tcnaf(CRATE, ADC1SLOT, 0, FCODE, 0, qstat);
    tcnaf(CRATE, ADC2SLOT, 0, FCODE, 0, qstat);
 
# Initialize and configure CAMAC modules
  log inform "Setting up CAMAC modules"
#
# The routine camac_module_setup is included via 
# expt_module_setup.h file. All CAMAC module setup 
# needs to be done in this routine. 
# Edit expt_module_setup.h file to make changes in this routine.
#
    camac_module_setup();
#
# Clear all scalers
  log inform " ===> Clear scalers \n"
#
# The following routine sets up the scalers.
# This routine is included via expt_crl.h file
# Please Edit expt_crl.h file to make changes in
# the scaler setup.
#
    camac_scal_clrall();


# HANDS-OFF-STARTS ********************************************
# Raise CAMAC crate inhibit 
# tcnaf(CRATE, 30, 9, 26, 0, qstat) /* A2 type controller  */
  tcnaf(CRATE, 27, 0, 16, 0, qstat);  /* CC32 type controller */

  log inform "User Prestart Executed"

end prestart

begin end

# Raise CAMAC crate inhibit 	
# tcnaf(CRATE, 30, 9, 26, 0, qstat) /*  A2 type controller */
  tcnaf(CRATE, 27, 0, 16, 0, qstat); /* CC32 type controller */

  CDODISABLE(VME,1,0);

  log inform "Create user event for scaler read" 
  rol->dabufp = (long *)0;
# HANDS-OFF-ENDS **********************************************
# CODA DATA BANK IS OPENED FOR TYPE 8 EVENTS
  UEOPEN(SCLR_EVNT,BT_UI4,13);
#
# Read CAMAC scalers     
# Syntax:
# tcamac_rread(0,crate,slot,0,num_of_channels,list_of_channels)
#
 tcamac_rread32(0, 1, SCLRSLOT, 0, 6, chlista);
#
# CODA DATA BANK IS CLOSED
  UECLOSE;
#
  log inform "User End Executed"

end end

begin pause

# IF you pause DAQ, raise crate inhibit and read the scalers

# Raise CAMAC crate inhibit 
#	tcnaf(CRATE, 30, 9, 26, 0, qstat); /* A2 type controller */
	tcnaf(CRATE, 27, 0, 16, 0, qstat); /* CC32 type controller */

  CDODISABLE(VME,1,0);

  log inform "Create user event for scaler read" 
  rol->dabufp = (long *)0;
  UEOPEN(SCLR_EVNT,BT_UI4,13);
# Read CAMAC scalers 
 tcamac_rread32(0, 1, 9, 0, 6, chlista);
  UECLOSE;

  log inform "User Pause Executed"

end pause

begin go
  
  log inform "Entering User Go"
  
  CDOENABLE(VME,1,0);

# Lower CAMAC crate inhibit 
#tcnaf(CRATE, 30, 9, 24, 0, qstat); /*  A2 type controller */
  tcnaf(CRATE, 27, 1, 16, 0, qstat); /* CC32 type controller */

end go

begin trigger usrtrig

# DO NOT touch the lines in this block *****************************************
#
	variable type1, type2, type3, type4
	unsigned short tdata16;

 rol->dabufp = (long *) 0;
 open event type EVTYPE of BT_UI4

# Read Trigger interface pattern into data stream and into the local variable data16
   vmetir_readdat(tdata16);
   data16 = tir[1]->tir_dat;

	type1 = data16&1;
	type2 = data16&2;	
#
# End of hands-off block  ****************************************************

# Read out modules according to trigger type
# Sparse access CAMAC readout of AD413A
# Syntax: Sparse Read
# tcamac_sread16(0,crate,slot,function,number_of_channels)
# 
 	  tcamac_sread16(0, 1, ADC1SLOT, 2, 4);	
 	  tcamac_sread16(0, 1, ADC2SLOT, 2, 4);	


 close event

end trigger

begin done usrtrig

end done


begin done

# ADC reset not needed when AD413 are run in singles mode with zero suppression
#  tcnaf(CRATE, ADC2SLOT, 0, FCODE, 0, qstat)
# Acknowledge tir register
  tirtack(0);

end done

begin status

end status

The download transition is the same for all experiments and needs not to be changed.

The prestart transition resets the camac crate, clears the scalers and any other modules and setup the DAQ modules for the desired operation. The following lists the key components of the prestart.

The go transition lowers the crate inhibit for the data acquistion to begin.

As soon as the DAQ receives the first trigger, the trigger needs to be handled. This involves reading the data, flushing it into the CODA data banks, and resetting the modules. The pause or the end transition both raise the crate inhibit, however, the end transition also flushes the scaler data into the data banks after the crate inhibit has been raised.

The routines camac_scal_clrall(), module_setup() are all defined in the header files expt_crl.h and expt_module_setup.h. These routines are specific to each module and require knowledge of how one needs to setup and readout the module. The routines specific to the example experiment as as follows:

void camac_scal_clrall() /* sets and clear all scalers */
/* Set the NSLOTS to the number of scaler modules you have */

#define NSLOTS 1

{
        int ext;
        int crate=1;
        int islot[NSLOTS]={9}; /* Array of Slot Numbers of NSLOTS */
        int nchan[NSLOTS]={6}; /* Array of Max Channels of NSLOTS */
        int data, q, i, j;
        data = 0;
        for(j=0; j<NSLOTS; j++) {
          for(i=0; i<nchan[j]; i++){
              cdreg(&ext, 0, crate, islot[j], i);
              cfsa(9, ext, &data, &q);  /* reset scalers */
                                   }
                                }
}

void camac_module_setup() /* setup CAMAC modules */
{
        int i, j, ii, ext, slot, data, q;
        int crate=1;

  /* setup EG&G 413 ADC */
  slot = 3;
  data = 0x5203; /* zero suppression */
  /*  data = 0xF303; /* random access readout */
  cdreg(&ext, 0, crate, slot, 0);  /* write to control register 1 */
  cfsa(16, ext, &data, &q);
  data = 0x000F;
  cdreg(&ext, 0, crate, slot, 1); /* write to control register 2 */
  cfsa(16, ext, &data, &q);
  data = 30;
  cdreg(&ext, 0, crate, slot, 0); /* set lower-level thresholds */
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 1);
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 2);
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 3);
  cfsa(17, ext, &data, &q);

slot = 5;
  data = 0x5203; /* zero suppression */
  /*  data = 0xF303; /* random access readout */
  cdreg(&ext, 0, crate, slot, 0);  /* write to control register 1 */
  cfsa(16, ext, &data, &q);
  data = 0x000F;
  cdreg(&ext, 0, crate, slot, 1); /* write to control register 2 */
  cfsa(16, ext, &data, &q);
  data = 30;
  cdreg(&ext, 0, crate, slot, 0); /* set lower-level thresholds */
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 1);
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 2);
  cfsa(17, ext, &data, &q);
  cdreg(&ext, 0, crate, slot, 3);
  cfsa(17, ext, &data, &q);
}

Routines such as tcamac_sread16, cfsa, and cdreg routines are all part of the standard CAMAC callable routines (see Appendix C for details).

All experiments require the secondary.crl and it must not be modified by the users.

Next: Generating Object Codes from Up: An Example Experiment Readout Previous: The Hardware Contents Index

Mohammad Ahmed 2003-07-23